Multiplexing of the data and address buses is done to reduce the pin count on the microprocessor chip. The address information is emitted at the beginning of a memory cycle, and external logic is expected to latch that address. Then the bus becomes the data bus and the required data is transferred to or from memory using the latched address.
In the 8085, this saves 8 pins at the cost of 1 pin, ALE. In the 8086/8088, this saves 16 pins at the cost of 1 pin, ALE. In some architectures or modes, there is no ALE, but the external logic is still required to know when to latch the address based on some other criteria.
As an example of that, in the original Intel 4004, the microprocessor's bus was 4 bits, while the address bus was 12 bits. There were 8 clock cycles. In the first three, external logic was expected to latch the three 4 bit parts of the 12 bit address. Similarly, in the next two, the resultant opcode, which as 8 bits, was multiplexed by the external logic into two 4 bit parts. (The 4004 was only a 16 pin chip, but it packed a lot of complexity in its day, being the world's first microprocessor.)
The data and address buses are multiplexed in order to save pin count on the chip. In the first clock cycle of a read or write cycle, the address is emitted on the address/data bus. The ALE signal is used to strobe the address, after which the address/data bus becomes the data bus. External logic is expected to strobe the address at the trailing edge of ALE.
ALE is generated directly by the 8085, and by the 8086/8088 in minimum mode. In maximum mode in the 8086/8088, ALE is generated by the 8288 Bus Controller.
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The higher order address bus is not multiplexed with data bus of 8085 because that is the way Intel designed the processor. Besides, the data bus is only 8 bits and the address bus is 16 bits. If you were to multiplex the whole address bus on the data bus, you would need two T1 (ALE) states, and that would be excess logic. Back to the original answer - that is simply the way Intel designed the processor.
In order to demultiplex the address and data bus, you provide latches that sample the multiplexed bus. At ALE=true, they follow the bus. At ALE=falling edge, they lock onto the last value of the bus. The latches will then become the address bus, while the original bus becomes the data bus.
A data bus is bidirectional because the processor needs it to both read and write. Also, in the case of the 4004, the data bus was tri-multiplexed with the 12 bit address bus and the 8 bit opcode bus.
The data bus in the 8086 is 16 bits in size, while the address bus is 20 (16bits would only address 64KB of memory, an extra 4 bits allows to address the total of 1MB, this is done trough segmentation of the memory). To form a multiplexed of data bus and address bus, four bits of 8086 address bus are grounded.
The data and address buses are multiplexed in order to save pin count on the chip. In the first clock cycle of a read or write cycle, the address is emitted on the address/data bus. The ALE signal is used to strobe the address, after which the address/data bus becomes the data bus. External logic is expected to strobe the address at the trailing edge of ALE. ALE is generated directly by the 8085, and by the 8086/8088 in minimum mode. In maximum mode in the 8086/8088, ALE is generated by the 8288 Bus Controller.
There are 2 kinds Data bus and address bus data bus which carries the data ( includes both instruction and data). address bus which carries where the data in the data bus must be sent to in the RAM or which I/O device has to be active to read / write data to the data bus .
it is nothing
The address bus is unidirectional becos address information is always given by microprocessor to i/o devices. The data bus is bidirectional bcos it takes the data from other devices & also give the data to other i/o devices
ALE is a signal that means that the data bus contains the lower order address bus values. External hardware should strobe the data bus during ALE time, and lock it on the falling edge of ALE.
The contents of the stack pointer and program counter are loaded into the address buffer and address-data buffer. These buffers are then used to drive the external address bus and address-data bus. As the memory and I/O chips are connected to these buses, the CPU can exchange desired data to the memory and I/O chips. The address-data buffer is not only connected to the external data bus but also to the internal data bus which consists of 8-bits. The address data buffer can both send and receive data from internal data bus.
since data can be read /write from/to the microprocessor, hence data bus is bidirectional. if data is required read from microprocessor then it will be pointing to a memory location by the address bus, by indicating which location data its required to read. similarly to write a data to a location, again the microprocessor will be to that particular location by holding that address in address bus. hence it will be unidirectional.