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The 5.5 in RST 5.5 means that the interrupt vector is located between RST 5 and RST 6.
The TRAP interrupt is nomaskable in the 8085 microprocessor because TRAP is intended to indicate some serious system problem, or a hardware assisted debugger single step facility.
There are 2 types interrupts in 8085 such as: 1)hardware interrupt 2)software interrupt
The lowest priority interrupt in the 8085 microprocessor is INTR, unless you also consider the software interrupts, RST 0 through RST 7, which are even lower.
RST 5.5 is level triggered interrupt & maskable also. it can be masked by using SIM intrruction. Vector address of the RST 5.5 interrupt is 002Ch
In the 8086/8088, the interrupt vector table is the first 1024 bytes of memory. In the 8085, the interrupt vector table is the first 64 bytes of memory if using the RST form of interrupt, otherwise the interrupt vector is provided by the interrupting device, usually in the form of a CALL instruction. The interrupt handler is wherever the interrupt vector points to.
RSTn(0-7) is software interrupt & RST(7.5,6.5,5.5) are INTEL's 8085 maskable interrupts their priority is respectively 7.5,6.5,5.5.RSTn.5 is hardware intterrupt and it is controlled by the external pin available on the chip of 8085. it is used to interrupt the microprocessor from its normal execution and tends to execute some ISR(interrupt service routine)
The name, RST6.5, was chosen because the interrupt vector lies halfway between RST 6 and RST 7, specifically at address 0034H.
The hardware initiates an interrupt when it feels that the situation requires the CPU's action.
RIM is Read Interrupt Mask. It is used to access the interrupt mask register, which contains the status of the three interrupt masks and the serial input data pin.
8085 is a microprocessor designed by Intel
The 8085 has five interrupts, INTR, RST5.5, RST6.5, RST7.5, and TRAP. It also has eight software interrupts, RST0, RST1, ..., RST7. The INTR interrupt requires a hardware response that is an opcode. Usually, the opcode is either a CALL instruction, in which case the interrupt vector can go anywhere in memory, or it is an RST instruction, in which case the vector is based on a table in low memory. In the case of RST instructions, either directly or via INTR, or the RSTx.5 interrupts, you simply multiply the interrupt number by 8 to get the vector address. The following table presents the vector addresses for all possible interrupts... RST 0 - 00H RST 1 - 08H RST 2 - 10H RST 3 - 18H RST 4 - 20H TRAP - 24H RST 5 - 28H RST5.5 - 2CH RST 6 - 30H RST 6.5 - 34H RST 7 - 38H RST 7.5 - 3CH