What is the differences among TTL and CMOS logic families?
{| ! CMOS ! TTL | CMOS has good packing density. TTL takes up
more space CMOS has better noise immmunity. TTL has a smaller noise
immunity range CMOS has a large fan out. TTL can power less inputs
CMOS consume less power. TTL use more power CMOS are highly static
sensitive. TTL IC's tend to be less susceptible to static
electricity CMOS uses FETS (Field-Effect Transistors) TTL uses BJTs
(Bipolar junction Transistors CMOS can run with a range of supply
voltages. TTL IC's run with a 5V supply. CMOS uses Vdd and Vss for
it's power connections TTL uses BJTs (Bipolar junction Transistors
CMOS takes a lot less power and is therefore suitable for battery
applications, but generally speaking can't run as fast. TTL devices
can drive more power into a load. CMOS chips can be damaged by
static electricity: even a static jolt that you or I can't feel
might destroy a CMOS chip! |}
