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Reduced Instruction Set Computer (RISC) vs. Complex Instruction Set Computer (CISC).

(1) CISC computers typically require more than one clock cycle to execute a given instruction

(2) RISC computers typically require only one clock cycle to execute a given instruction

That said, a CISC "opcode" can often perform more than a RISC "opcode". This results in much shorter code for CISC machines which is much easier to read and maintain. That said, CISC computers often have "dead cycles" in which the processor isn't doing anything useful, or is performing a redundant command.

As an example, if one tries to do a MULT memoryLoc1, memoryLoc2, register followed by an ADD memoryLoc1, memoryLoc2, anotherRegister, then a CISC machine must access main memory (or cache) 4 times and perform 2 computations and two moves from the ALU to a register. A RISC machine (while requiring more, but simpler, instructions) would never need to go out to memory for the additional 2 times since the information was already retrieved. Memory access can be a very time expensive operation.

All in all, RISC code is much more optimize-able and significant performance improvements can be realized over CISC.

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Q: What is the main difference between RISC and CISC in computer architecture?
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Which two categories are used to classify CPU architecture?

CISC and RISC are the two categories that are used to classify CPU architecture. CISC is an acronym for complex instruction set computer.


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Because that's how Intel designed it.


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