Microinstructions are stored in control memory in groups, with each group specifying routine.
Each computer instruction has its own microprogram routine in control memory to generate the
microoperations that execute the instruction. The hardware that controls the address sequencing
of the control memory must be capable of sequencing the microinstructions within a routine and
be able to branch from one routine to another. To appreciate the address sequencing in a
microprogram control unit, let us enumerate the steps that the control must undergo during the
execution of a single computer instruction.
An initial address is loaded into the control address register when power is turned on in the
computer. This address is usually the address of the first microinstruction that activates the
instruction fetch routine. The fetch routine may be sequenced by incrementing the control address
register through the rest of its microinstructions. At the end of the fetch routine, the instruction is
in the instruction register of the computer.
The control memory next must go through the routine that determines the effective address
of the operand. A machine instruction may have bits that specify various addressing modes, such
as indirect address and index registers. The effective address computation routine in control
memory can be reached through a branch microinstruction, which is conditioned on the status of
the mode bits of the instruction. When the effective address computation routine is completed, the
address of the operand is available in the memory address register.
The next step is to generate the microoperations that execute the instruction fetched from
memory. The microoperation steps to be generated in processor register depend on the operation
code part of the instruction. Each instruction has its own microprogram routine stored in a given
location of control memory. The transformation from the instruction code bits to an address in
control memory where the routine is located is referred to as a mapping process. A mapping
procedure is a rule that transforms the instruction code into a control memory address. Once the
required routine is reached, the microinstructions that execute the instruction may be sequenced
by incrementing the control address register, but sometimes the sequence of microoperations will
depend on values of certain status bits in processor registers. Micro programs that employ
subroutines will require an external register for storing the return address. Return addresses
cannot be stored in ROM because the unit has no writing capability.
When the execution of the instruction is completed, control must return to the fetch
routine. This is accomplished by executing an unconditional branch microinstruction to the first
address of the fetch routine. In summary, the address sequencing capabilities required in control
memory are:
1. Incrementing of the control address register.
2. Unconditional branch or conditional branch, depending on statues bit conditions.
3. A mapping process from the bits of the instruction to an address for control memory.
4. A facility for subroutine call and return.
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MAR-memory address register used stored the address of the memory loaction MBR- memory buffer register is the actully data.
Find the mac address of that computer.
With a 20-bit address bus, a computer can address approximately 1,048,576 memory locations, which is equivalent to 1 megabyte of memory.
1) Private IP addtess is an unique number/address assign to a computer within the organization or private network or intranet. 2) Using private IP address we can locate a computer on private network.
my computer isn't assigning an ip address and my modem is online hoe do i connect to the internet..