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I find it simplest to think of SPI as a way for two devices to trade the contents of their SPI registers. The master drives the clock (typically 8 or 16 clocks for 8 or 16 bit SPI registers) and when it has finished, the master's SPI register holds the value that the slave placed in its SPI register and the slave's SPI register holds the value that was in the master's SPI register.

This requires three connections, a clock (driven by the master) and a data line from each device (master in/slave out, and master out/slave in).

There are typically other connections required for practical purposes, such as interrupt and select lines.

SPI is a synchronous protocol, so the clock signals do not have to be evenly spaced (constant frequency). The slave is only looking for the correct number of clock transitions.

The master and slave must be set up to expect the data to be valid at the correct clock transitions (high-to-low or low-to-high). This is the concept of SPI "modes."

Usually a slave device will trigger an internal interrupt when a new value arrives, and if the value is not read before a new value arrives, an overflow flag will be set, indicating the data has been lost.

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